1. Field of the Invention
It is related to a prober for testing semiconductor wafers, and more particularly to a control method and a control program for a prober that are capable of enhancing throughput.
2. Description of the Related Art
FIG. 4 is a block diagram disclosed in Japanese Unexamined Patent Publication No. 4 (1992) -354345. Electric characteristics of pellets (chips) in a wafer 103 are measured by a semiconductor testing device 101, and when all tests on one wafer has been completed, a control device 105 reads the yield of the wafer 103 from a probing device 102, and the number of wafers of which the yield is less than a specified standard is counted by a counter 107. When the counted number reaches a predetermined number, a controller 106 sends from a command transmitter 108 a measured data output request command to the semiconductor testing device 101. The measured data sent from the semiconductor testing device 101 is put into a measured data storage area 109, and when the collection of data of a predetermined number of wafers has been completed, the controller 106 issues a stop signal to the probing device 102 so as to stop probing.
Related technology is disclosed in Japanese Unexamined Patent Publication No. 54 (1979) -004078.
In the measurement of shipping tests of mass-produced items, a plurality of (usually 25) wafers are usually packed into a cassette and stored as one lot, and the wafers are tested in units of one lot. However, wafers are not necessarily always tested in units of a lot. When chips that have passed a test reach a predetermined number, the wafers are divided, and proceed to a subsequent process. In such a case, a lot may on occasions need to be divided on the basis of the test results of testing.
For example, when dividing a lot after testing, wafers that make up one lot are set in the cassette, and when the number of chips passing the test reach a predetermined number, the test is interrupted, the cassette is taken out of the prober, and the lot divided. In such circumstances, in order to continue testing on the remaining wafers, the cassette in which the remaining wafers are stored must be set in the prober again. The process of setting again and then aligning, the wafers takes place and the level of throughput may be lowered.
Further, when, for example, a lot is divided before testing is commenced, it is essential to predict the yield and to prepare a number of wafers that is considered sufficient for purposes of obtaining chips that will pass the test. However, if the yield is higher than predicted, an unnecessary measurement is performed. If, on the other hand, the yield is lower than predicted, additional wafers need to be added to the lot, and the process of removing the cassette and setting it again takes time. In either event, efficiency in terms of time is poor and the level of throughput is lowered.